TIMING ANALYSIS AND OPTIMIZATION OF SEQUENTIAL CIRCUITS

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Ouvrage 0-7923-8321-4 : TIMING ANALYSIS AND OPTIMIZATION OF SEQUENTIAL CIRCUITS
Timing Analysis and Optimization of Sequential Circuits describes CAD algorithms for analyzing and optimizing the timing behavior of sequential circuits with special reference to performance parameters such as power and area. A unified approach to performance analysis and optimization of sequential circuits is presented. The state of the art in timing analysis and optimization techniques are described for circuits using edge-triggered or level-sensitive memory elements. Specific emphasis is placed on two methods that are true sequential timing optimizations techniques: retiming and clock skew optimization. Timing Analysis and Optimization of Sequential Circuits is written for graduate students, researchers and professionals in the area of CAD for VLSI and VLSI circuit design.
Table of Contents List of Figures
Preface
1
Introduction
1
2
Timing Analysis of Sequential Circuits
7
3
Clock Skew Optimization 33
4
The Basics of Retiming 65
5
Minarea Retiming
99
6
Retiming Control Logic 123
7
Miscellaneous Issues in Retiming 147
8
Conclusion
169
References
171


Auteur : MAHESHWARI
Editeur : KLUWER
Nombre de pages : 380
Date de publication : 10 1998

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